A designer may use a high-level modeling system (HLMS), such as the System Generator HLMS available from Xilinx Inc., to design an electronic system at an abstract level using an intuitive user interface of the HLMS. In addition, the HLMS permits the designer to simulate the electronic system and translate the abstract representation of the electronic system into a hardware description language (HDL) for subsequent synthesis and production of a hardware implementation of the electronic system.
Various tools, including HLMS and synthesis tools, may increase the productivity of a designer of an electric system. The productivity of a designer may be increased by using previously designed blocks for frequently used functions that are provided in a library of an HLMS. Typically, such blocks in a library of an HLMS may be parameterized to allow the blocks to be adapted to a wide variety of system requirements. The productivity of a designer may also be increased by tools that automatically infer details of the electronic design from design information provided by the designer. For example, blocks in a library of an HLMS may have parameterized data processing rates. Selection by the designer of an actual data processing rate for a few blocks in the electronic design may permit a tool to infer compatible data processing rates for every block in the electronic design.
Parameters of a block may include the rate of data transfer and the type of data transfer, such as unsigned integers and fixed point numbers with various width representations, at the inputs and outputs of the block. A user-specified value for rate and/or type at one block may be propagated to other blocks by an HLMS, such as Simulink. However, existing methods may fail in processing electronic design having feedback loops or having interdependent rate and type parameters.
The present invention may address one or more of the above issues.